EFBus10 at 50 MHz: measured MCU–Linux SPI on Arduino UNO Q
EFBus10: from a 4 MHz engineering limit to a measured 50 MHz transfer
FermiLabs developed EFBus to giveArduino UNO Qapplications an explicit, measured MCU-to-Linux service boundary. In the 2026 engineering cycle, EFBus10 added continuous integer SPI clock configuration from 1 to 50 MHz, typed profiles and bounded recovery, while keeping a single bus/data-session owner.
What was actually measured
On29 October 2026, a Muletto-18 UNO Q with the EFC9 EFBus10 hardware profile completed846 additional 192-byte SPI transfers over 16.613 secondsat aconfigured 50 MHz, with zero new reported transport errors or sample gaps. Transfer latency p50/p95/p99 was176.5 / 196.5 / 215.5 microseconds.
This is bounded physical transfer evidence. It is not an oscilloscope verification of the real SCK frequency, an all-time zero-error guarantee or a sensor-to-actuator latency benchmark. Serializing 192 bytes over a hypothetical ideal 50 MHz SPI link takes about 30.72 microseconds, so the larger observed transfer time also includes host/driver, scheduler, MCU rearm and other processing costs.
How this changes RoboCup engineering
ArduinoRoboCup 2027 uses a separate Robot-A25 firmware schema and retains a3.2 MHz qualified baselineuntil its own high-clock canary passes. The Muletto 50 MHz measurement must not be presented as a Robot Race acceptance. DMA/IRQ instrumentation and ACK scheduling remain independent engineering tasks with their own qualification criteria.
Projects affected:Arduino EFBus, RoboCup 2027 andArduino OpenDAQas a consumer of typed acquisition contracts.
